Conferences
FastAbstracts
The
History
Archives
of
FastAbstracts
ISSRE
2003
ISSRE 2002
ISSRE
2001
ISSRE 2000
ISSRE 1999
ISSRE 1998
FTCS
1999
FTCS 1998
FTCS-21
The Twenty-First Annual International Symposium on Fault-Tolerant Computing
June 25-27, 1991
Montreal, Canada
**************************************************
Software Defects and their Impact on System Availability - A Study of
Field Failures in Operating Systems
M. Sullivan and R. Chillarege; pg.2
Error/Failure Analysis Using Event Logs from Fault Tolerant Systems
I. Lee, R.K. Iyer, and D. Tang; pg.10
Fault-Tolerance Testing in the Advanced Automation System
T.R. Dilenno, D A. Yaskin, and J.H. Barton; pg.18
Fault-Tolerance Experiments of the "Hiten" Onboard Space Computer
T. Takano, T. Yamada, K. Shutoh, and N. Kanekawa; pg.26
TSUNAMI: A Path Oriented Scheme for Algebraic Test Generation
T. Stanion and D. Bhattacharya; pg.36
An Architectural Level Test Generator for a Hierarchical Design Environment
J. Lee and J.H. Patel; pg.44
Test Generation for Synchronous Sequential Circuits Using Multiple Observation
Times
I. Pomeranz and S.M. Reddy; pg.52
Functional Test Generation for Pipelined Computer Implementations
D.C. Lee and D.P. Siewiorek; pg.60
Integrity S2 - A Fault-Tolerant Unix Platform
D. Jewett; pg.70
Design Decisions for the FTM: A General Purpose Fault Tolerant Machine
M. Banatre, G. Muller, B. Rochat, and P. Sanchez; pg.71
The Stratus Architecture
S. Webber and J. Beirne; pg.79
Signature Analysis with Modified Linear Feedback Shift Registers (M-LFSRs)
R. Raina and P.N. Marinos; pg.88
Signature Analysis and Test Scheduling for Self-Testable Circuits
A.P. Strole and H.J. Wunderlich; pg.96
Bounds on Signature Analysis Aliasing for Random Testing
N.R. Saxena, P. Franco, and E.J. McCluskey; pg.104
Challenges in Designing Fault-Tolerant Systems
R. Chillarege, R. Horst, D.P. Siewiorek, and R.S. Swarz; pg.114
Designing Error Detection and Recovery for a Fault-Tolerant Computer System
T. Bissett; pg.115
Evolving Systems for Continuous Availability
J.F. Isenberg; pg.116
Practical Problems in the Design of Fault-Tolerant Hardware
D. Lenoski; pg.116
Design Process for High-Availability Systems
D. Steinfeld; pg.117
On Establishing Fault Tolerance Objectives
J.J. Stiffler; pg.117
Construction and Analysis of Fault-Secure Multiprocessor Schedules
D. Gu. D J. Rosenkrantz, and S.S. Ravi; pg. 120
A Fault-Tolerant FFT Processor
M. Tsunoyama and S. Naito; pg.128
Concurrent Error Detection and Fault-Tolerance in Linear Digital State
Variable Systems
A. Chatterjee and M.A. d'Abreu; pg.136
The IBM S/390 Sysplex Timer
T.B. Smith, W.A. Moorman, and T. Dang; pg.144
Bridging, Transition, and Stuck-Open Faults in Self-Testing CMOS Checkers
S.D. Millman and E.J. McCluskey; pg.154
Multiple Fault Analysis Using a Fault Dropping Technique
A. Verreault, E M. Aboulhamid, and Y. Karkouri; pg.162
VLSI Implementation of a Self-Checking Self-Exercising Memory System
D.A. Rennels and H. Kim; pg.170
The UCLA Mirror Processor: A Building Block
for Self- Checking Self-Repairing Computing Nodes
Y. Tamir, M. Liang, T. Lai, and M. Tremblay; pg.178
Load Sharing in Hypercube Multicomputers in the Presence of Node Failure
Y.C. Chang and K.G. Shin; pg.188
Cost Effectiveness Analysis of Different Fault Tolerance Strategies for
Hypercube Systems
V. Grassi; pg.196
An Evaluation of Fault-Tolerant Hypercube Architectures for Onboard Computing
J.C. Peterson, J.O. Tuazon, and E.T. Upchurch; pg.204
An Optimal Algorithm for Distributed System Level Diagnosis
A. Bagchi and S.L. Hakimi; pg.214
An Adaptive Distributed System-Level Diagnosis Algorithm and Its Implementation
R. Bianchini,Jr. and R. Buskens; pg.222
Probabilistic Diagnosis Algorithms Tailored to System Topology
S. Rangarajan and D. Fussell; pg.230
Certification Trails for Data Structures
G.F.Sullivan and G M. Masson; pg.240
Tolerating Failures in the Bag-of-Tasks Programming Paradigm
D.E. Bakken and R.D. Schlichting; pg.248
Fault Tolerance in Parallel Implementations of Functional Languages
R. Jagannathan and E.A. Ashcroft; pg.256
Optimal Broadcasting in Faulty Hypercubes
B.S. Chlebus, K. Diks, and A. Pelc; pg.266
A Multiple-Fault Tolerant Sorting Network
J. Sun and J. Gecsei; pg.274
Fault-Tolerant Gamma Interconnection Networks
N.F. Tzeng and P.J. Chuang; pg.282
Some Practical Issues in the Design of Fault-Tolerant Multiprocessors
S. Dutt and J.P. Hayes; pg.292
A Multiple Copy Approach for Delivering Messages Under Deadline Constraints
P. Ramanathan and K.G. Shin; pg.300
State Space Generation for Degradable Multiprocessor Systems
B.E. Aupperle and J.F. Meyer ; pg.308
Exploiting Instruction-Level Resource Parallelism for Transparent, Integrated
Control-Flow Monitoring
M.A. Schuette and J.P. Shen; pg.318
Optimal Signature Placement for Process-Error Detection Using Signature
Monitoring
K.D. Wilken; pg.326
A New Approach to Control Flow Checking Without Program Modification
T. Michel, R. Leveugle, and G. Saucier; pg.334
Fault-Tolerant Communications Processing
V. Cherkassky, R. Rooholamini, and H. Lari-Najafi;
pg.344
Performability Analysis of Distributed Real-Time Systems with Repetitive
Task Invocation
S.M. Rezaud Islam and H.H. Ammar; pg.352
The RM Recovery Services
D.V. Pitts; pg.360
Recovery Concepts for Data Sharing Systems
E. Rahm; pg.368
Burst and Unidirectional Error Detecting Codes
S. Al-Bassam, B. Bose, and R. Venkatesan; pg.378
Pattern Sensitive Fault Testing of RAMs with Built-in ECC
M. Franklin and K K. Saluja; 385
Fault-Tolerant Memory Design in the IBM Application System/400
C.L. Chen and L.E. Grosbach; pg.393
Gracefully Degradable Disk Arrays
A.L. Narasimha Reddy and P. Banerjee
An Experimental Study on Software Structural Testing: Deterministic versus
Random Input Generation
P. Thevenod-Fosse, H. Waeselynck, and Y. Crouzet; pg.410
Evaluation of Deterministic Fault Injection for Fault-Tolerant Protocol
Testing
K. Echtle and Y. Chen; pg.418
Program Fault Tolerance Based on Memory Access Behavior
N.S. Bowen and D K. Pradhan; pg.426
Distributed Reconfiguration and Recovery in the Advanced Architecture
On-Board Processor
M.J. Iacoponi and S.F. McDonald; pg.436
On the Reconfiguration of Memory Arrays Containing Clustered Faults
D M. Blough; pg.444
Reconfiguration Algorithm for Fault-Tolerant Arrays with Minimum Number
of Dangerous Processors C. Chen, A. Feng, T. Kikuno, and K Torii
A Distributed Fault Tolerant Architecture for Nuclear Reactor and Other
Critical Process Control Applications
M. Hecht, J. Agron, H. Hecht, and K.H. Kim; pg.462
Approaches to Design of Temporary Blackout Handling Capabilities and an
Evaluation with a Real-Time Tightly Coupled Network Testbed
K.H. Kim, W.J. Guan, A. Damm, and J.A. Rohr; pg.470
The Role of Format Methods in the Requirements Analysis of Safety-Critical
Systems: A Train Set Example
A. Saeed, R. de Lemos, and T. Anderson; pg.478
System Level Diagnosis: Combining Detection and Location
N.H. Vaidya and D.K. Pradhan; pg.488
The t/(n-l)-Diagnosability and Its Applications to Fault Tolerance
J. Xu; pg.496
Design of Multiprocessor Systems for Concurrent Error Detection and Fault
Diagnosis
B. Vinnakota and N K. Jha; pg.504